Making software fast on any processor

Previously a PhD student at ETH Zurich working on AI-driven compiler research. Before that, he was at Huddly through their IPO and at Continental architecting performance for automotive software.

Specialized in GPU architectures and scalable HPC at RWTH Aachen. Published at leading HPC venues before joining as co-founder to build the compiler infrastructure behind Daisytuner.

Holds a PhD in Computational Mechanics and dual MSc degrees from TU Munich. Brings deep expertise in CFD simulation and autotuning from research stints at Inria Grenoble and Strasbourg.

MSc from TU Darmstadt in processor architectures and hardware acceleration. Worked on RISC-V prototypes and CGRA-based runtime acceleration before joining to target novel hardware at Daisytuner.

MSc with distinction from RWTH Aachen. His thesis on compile-time loop lifting for GPU tensor cores set the foundation for his work on compiler optimizations at Daisytuner.

Staff Scientist at Lawrence Livermore National Laboratory. ACM Gordon Bell Prize recipient working on ML-driven compilation and large-scale scientific computing.